Among the many verification challenges confronting system-on-chip designers these days, clock domain crossings (CDCs) rank near the top in difficulty. Two particularly troublesome CDC-related issues ...

Interfaces to digital data recorders often require deep FIFO buffers to match the system's data rate to the recorder rate. Sometimes, a second set of FIFO buffers in the opposite direction handles ...

System designers have long used FIFO memories to couple subsystems with disparate data-transfer rates. Recently, new types of these devices–with new capabilities–have emerged. Know your FIFO choices ...