Who would have thought that a circuit comprising only two 2-input NAND gates could be so complicated (or, should we say, “interesting”)? Up to this point (click here to see my earlier columns), the ...

The output frequency of the simple VCO in Figure 1, which is synthesized from inverting latch stages, is tunable to an integer multiple of the input frequency by selecting which output phases feed ...

How to build a circuit that converts capacitance into a pulse train. Test results of the circuit design. The circuit in Figure 1 allows you to convert capacitance into a pulse train by using a ...

This paper presents a low power Clock Gating scheme for clock power improvement that reduces power dissipation by deactivating the clock signal to an inactive value (for clock gating cell) when clock ...

Editor’s Note: NAND and NOR Flash memory play an integral role in embedded systems of all sorts but successful implementation requires careful attention to key ...