Semiconductor Engineering

Power Gating Enabling in NPUs (Univ. of Illinois Urbana-Champaign)

A new technical paper titled “ReGate: Enabling Power Gating in Neural Processing Units” was published by researchers at the University of Illinois Urbana-Champaign. “The energy efficiency of neural ...
Electronic Design

Power-Gating Flow Reduces Leakage By 240X

Sequence Design and Korea's Dongbu Electronics, Inc. have demonstrated a 240X reduction in leakage power on a test design with their jointly developed MTCMOS power-gating flow. Using their jointly ...
Semiconductor Engineering

Nano Gap MEMS Switches for Power Gating in Low Power Systems (KAIST, Chonnam National Univ.)

A new technical paper titled “Ultra-Fast, Low-Resistance Nano Gap Electromechanical Switch for Power Gating Applications” was published by researchers at KAIST and Chonnam National University. “The ...
Electronic Design

Power-Integrity Flow Cuts Out the Guesswork

Thanks to a healthy dose of physical awareness, a power-integrity implementation and optimization tool attacks many facets concurrently. In many ways, power-integrity closure can be viewed along the ...
Design-Reuse

1 Port High-Current Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option

1 Port Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option ...
Design-Reuse

Signle Port High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option

Signle Port High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option ...