You can't go anywhere in the engineering community now without hearing about signal integrity (SI). It was the main topic of exhibiters and papers at the recent DesignCon, it is very popular on the ...

The data connection device under test in Figure 1 is characterized by comparing test signals sent into the link with signals measured at the link output. The differences between these two test signals ...

If you are looking to brush up on signal integrity best practices or just want to learn more, Doug Brooks for UltraCAD has written many papers on signal integrity and electromagnetic compliance. There ...

The future of design is here, and artificial intelligence (AI) is rapidly becoming a powerful ally in the world of signal integrity. AI isn’t just about doing more with less; it’s about doing things ...

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...

The most different aspect between a normal lamination structure and High-Density Fan-out (HDFO) is the routing scale. That aspect is also the challenge and focus of this study. At an HDFO scale, most ...

Are you designing a board with high-speed chipsets on either end of the link? You own the interconnect—and the risk. As clock and data rates climb, maintaining signal integrity becomes critical for ...

The potential causes of signal integrity problems in a device are wide ranging, including the physical layout of the design, underperforming components, and accumulative affects with multiple causes.

Signal integrity is one of the many challenges faced by chip designers. Deep submicron technologies are unfriendly hosts for the nice, clean signals desired. The culprits that compromise signal ...